{"title":"A mechanism of row redundancy sharing for reparable memory systems","authors":"K. Amirkhanyan, S. Shoukourian, V. Vardanian","doi":"10.1109/CSITECHNOL.2017.8312140","DOIUrl":null,"url":null,"abstract":"In this paper, we proposed a method for implementation of a mechanism for “redundancy sharing” allowing to repair a fault/defect in a memory instance from a memory system with hundreds/thousands of memory instances with an available shared redundant element of another memory instance in the same group of the Memory System that has been preliminarily grouped with respect to its main parameters, e.g. clock, power and position of instances. The calculations showed that the hardware is saved to a great extent with a negligible impact on memory's functional performance. Not only excluded redundancies contribute in the area saving but also reduction of the redundancy registers due to reduction of redundancies, as well as reduction of the control logic and the number of necessary fuses.","PeriodicalId":332371,"journal":{"name":"2017 Computer Science and Information Technologies (CSIT)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Computer Science and Information Technologies (CSIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSITECHNOL.2017.8312140","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper, we proposed a method for implementation of a mechanism for “redundancy sharing” allowing to repair a fault/defect in a memory instance from a memory system with hundreds/thousands of memory instances with an available shared redundant element of another memory instance in the same group of the Memory System that has been preliminarily grouped with respect to its main parameters, e.g. clock, power and position of instances. The calculations showed that the hardware is saved to a great extent with a negligible impact on memory's functional performance. Not only excluded redundancies contribute in the area saving but also reduction of the redundancy registers due to reduction of redundancies, as well as reduction of the control logic and the number of necessary fuses.