{"title":"An intelligent hardware structure for impulse noise suppression","authors":"G. Louverdis, I. Andreadis, N. Papamarkos","doi":"10.1109/ISPA.2003.1296937","DOIUrl":null,"url":null,"abstract":"In this paper an intelligent hardware module suitable for the computation of an adaptive median filter (AMF) is presented. The proposed digital hardware structure is pipelined and parallel processing is used to minimize computational time. It is capable of processing gray-scale images of 8-bit resolution with 3/spl times/3 or 5/spl times/5-pixel image neighborhoods as options for the computation of the filter output. However, the system can be easily expanded to accommodate windows of larger sizes. The function of the proposed circuitry is to detect the existence of impulse noise in an image neighborhood and apply the median filter operator only when necessary. Moreover, the noise detection procedure can be customized so that a range of pixel values is considered as impulse noise. In this way, the integrity of edge and detail information of the image under process is preserved and blurring is avoided. The proposed digital structure was implemented in FPGA and it can be used in industrial imaging applications, where fast processing is of the utmost importance. As an example, the time required to perform filtering of a grayscale image of 260/spl times/244 pixels is approximately 7.6 msec. The typical system clock frequency is 65 MHz.","PeriodicalId":218932,"journal":{"name":"3rd International Symposium on Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"3rd International Symposium on Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPA.2003.1296937","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
In this paper an intelligent hardware module suitable for the computation of an adaptive median filter (AMF) is presented. The proposed digital hardware structure is pipelined and parallel processing is used to minimize computational time. It is capable of processing gray-scale images of 8-bit resolution with 3/spl times/3 or 5/spl times/5-pixel image neighborhoods as options for the computation of the filter output. However, the system can be easily expanded to accommodate windows of larger sizes. The function of the proposed circuitry is to detect the existence of impulse noise in an image neighborhood and apply the median filter operator only when necessary. Moreover, the noise detection procedure can be customized so that a range of pixel values is considered as impulse noise. In this way, the integrity of edge and detail information of the image under process is preserved and blurring is avoided. The proposed digital structure was implemented in FPGA and it can be used in industrial imaging applications, where fast processing is of the utmost importance. As an example, the time required to perform filtering of a grayscale image of 260/spl times/244 pixels is approximately 7.6 msec. The typical system clock frequency is 65 MHz.