On the power dissipation in dynamic threshold silicon-on-insulator CMOS inverter

Abstract

The leakage current due to the parasitic PN junction diodes in SOI DTMOS (Dynamic threshold voltage MOSFET) inverter is reported. The additional power dissipation in DTMOS inverter due to the diodes is quantified through an analytical model and verified by MEDICI simulation. Power dissipation between conventional SOI CMOS and SOI DTMOS inverters is compared.