A Low-Power Voltage Limiter/Regulator IC in Standard Thick-Oxide 130 nm CMOS for Inductive Power Transfer Application

Abstract

This paper presents a novel CMOS low-power voltage limiter/regulator circuit with hysteresis for inductive power transfer in an implanted telemetry application. The circuit controls its rail voltage to the maximum value of 3 V DC employing 100 mV of comparator hysteresis. It occupies a silicon area of only 127 µm × 125 µm using the 130 nm IBM CMOS process. In addition, the circuit dissipated less than 1 mW and was designed using thick-oxide 3.6 V NMOS and PMOS devices available in the process library.