{"title":"An Extremely Massive High-Quality True-Random Binary Data Stream Generator","authors":"J. Genoff","doi":"10.1109/ET.2018.8549664","DOIUrl":null,"url":null,"abstract":"The design and the operation of a hardware uniform-distribution true-random binary data generator are presented. This device implements a recent idea to utilize parallel interface EPROM ICs that are already considered obsolete, but when brought into an abnormal state by specific programming, tend to behave as a physical true-randomness generating core. The proposal in this paper aims to derive the most of productivity and quality from this approach, by further violating the EPROM’s normal operation rules and by surrounding the core with a latest technology control unit. The latter provides also a high-speed PCI Express computer interface to the device.","PeriodicalId":374877,"journal":{"name":"2018 IEEE XXVII International Scientific Conference Electronics - ET","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE XXVII International Scientific Conference Electronics - ET","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ET.2018.8549664","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The design and the operation of a hardware uniform-distribution true-random binary data generator are presented. This device implements a recent idea to utilize parallel interface EPROM ICs that are already considered obsolete, but when brought into an abnormal state by specific programming, tend to behave as a physical true-randomness generating core. The proposal in this paper aims to derive the most of productivity and quality from this approach, by further violating the EPROM’s normal operation rules and by surrounding the core with a latest technology control unit. The latter provides also a high-speed PCI Express computer interface to the device.