A bit slice architecture for microprogrammable machines

Abstract

The use of a bit slice architecture offers an attractive alternative to the design of microprogrammable computing architectures. By bit slice we mean typically a LSI chip containing either a 2 bit, 4 bit where n is very small. This paper describes these particular architectures to design in horizontal microprogramming. Hardware design implementations for both fixed point and floating point arithmetic algorithms are proposed. Experiences with these numerical hardware are discussed, along with problems encountered.