Can the advantages of RISC be utilized in real time systems?

A. Steininger, H. Schweinzer
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引用次数: 3

Abstract

Within the last few years a lot of improvements have been made for processor architectures. Average and peak performance are increasing continuously. RISC, caching, pipelining and similar features have become indispensable to many systems. In critical real time systems, however, peak and average values are of minor interest. Because strict deadlines have to be met, only those values may be considered, that can be guaranteed even under adverse conditions. Features like reduced instruction set, caching, pipelining etc. are based upon statistical considerations and do not necessarily improve worst case performance. The question arises, whether new powerful processor architectures-especially the RISC architecture-are suitable for real time systems and if so, under which conditions. Some of the most important hardware features are analyzed to find an answer to this question.<>
RISC的优势能否在实时系统中得到利用?
在过去的几年里,处理器架构有了很多改进。平均性能和峰值性能不断提高。RISC、缓存、流水线和类似的特性已经成为许多系统不可或缺的一部分。然而,在关键的实时系统中,峰值和平均值是次要的。因为必须遵守严格的最后期限,所以只能考虑那些即使在不利条件下也能得到保证的价值。精简指令集、缓存、流水线等特性是基于统计考虑的,并不一定能提高最坏情况下的性能。问题来了,新的强大的处理器体系结构——尤其是RISC体系结构——是否适合实时系统,如果适合,在什么条件下适合。为了找到这个问题的答案,我们分析了一些最重要的硬件特性
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