3D Microstrip Line Taper on Ultra-low Dielectric Constant Substrate

Abstract

In this paper, a new microstrip three-dimensional taper is presented. This new taper enables circuit-in-substrate (CIS) integration of high-quality microwave components with a microstrip line designed on a thick, ultra-low dielectric constant substrate. The width of microstrip lines on thick low dielectric constant materials is considerably large and can create a shunt capacitive loading when using edge mount connectors. The microstrip line can be tapered in the planar direction to reduce the shunt capacitance at the cost of added mismatch. The proposed technique adds a vertical tapering of the substrate, which results in a constant impedance across the substrate and reduces the mismatch between the microstrip and the connector. For verification, the 3D microstrip line taper is fabricated and measured. Full-wave simulation results and measurements are compared to validate the proposed design.