{"title":"An E-Band Phase Modulated Pulse Radar SoC with An Analog Correlator","authors":"Wen Zhou, Y. Tousi","doi":"10.1109/RFIC54546.2022.9863185","DOIUrl":null,"url":null,"abstract":"This paper presents a bi-static integrated pulse radar in the E-band based on a digitally modulated transmitter and an analog processing receiver module. The proposed frontend correlator operates at 1Gbps and uses a 1.5-bit sampler to compress the sensing data, enabling a low-speed and energy-efficient digital backend while delivering a high range resolution. The TSMC 65nm chip prototype has a 1.5mm x 1.3mm area and consumes a total of 407mW with only 38mW corresponding to the analog baseband and digital backend. Over-the-air measurements at the 66GHz carrier frequency indicate the measured distance from the correlator output has an RMS error of 11.6cm and the integral non-linearity is less than 10cm across the entire target range, demonstrating the state-of-the-art range resolution with superior energy efficiency.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863185","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a bi-static integrated pulse radar in the E-band based on a digitally modulated transmitter and an analog processing receiver module. The proposed frontend correlator operates at 1Gbps and uses a 1.5-bit sampler to compress the sensing data, enabling a low-speed and energy-efficient digital backend while delivering a high range resolution. The TSMC 65nm chip prototype has a 1.5mm x 1.3mm area and consumes a total of 407mW with only 38mW corresponding to the analog baseband and digital backend. Over-the-air measurements at the 66GHz carrier frequency indicate the measured distance from the correlator output has an RMS error of 11.6cm and the integral non-linearity is less than 10cm across the entire target range, demonstrating the state-of-the-art range resolution with superior energy efficiency.
本文提出了一种基于数字调制发射机和模拟处理接收机模块的e波段双基地集成脉冲雷达。所提出的前端相关器工作速度为1Gbps,使用1.5位采样器压缩传感数据,在提供高范围分辨率的同时实现低速节能的数字后端。台积电65nm芯片原型的面积为1.5mm x 1.3mm,总功耗为407mW,其中模拟基带和数字后端仅对应38mW。在66GHz载波频率下的空中测量表明,在整个目标范围内,与相关器输出的测量距离的RMS误差为11.6cm,积分非线性小于10cm,展示了最先进的距离分辨率和卓越的能源效率。