BZK.SAU.FPGA10.0: Microprocessor architecture design on reconfigurable hardware as an educational tool

H. Oztekin, Feyzullah Temurtaş, A. Gulbag
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引用次数: 8

Abstract

The Computer Architecture and Organization course in Computer and Electrical Engineering departments faces with a big problem: the migration from theory to practice. In order to solve this problem, a Computer Architecture simulator named BZK.SAU[1] is designed using an emulator program for educational purpose. This approach has important limitations. While students can complete and simulate their designs using software, they do not have the chance to implement and to run their designs in actual hardware. This work presents our solution to this problem: the FPGA implementation of BZK.SAU so that it would look and behave like the computer architecture simulator published in [1]. So we have implemented BZK.SAU Computer Architecture Simulator by using Altera® FPGA board that is a reconfigurable hardware prototyping development platform.
fpga10.0:基于可重构硬件的微处理器架构设计
计算机与电气工程专业的计算机体系结构与组织课程面临着从理论到实践的大问题。为了解决这个问题,我们设计了一个名为BZK的计算机体系结构模拟器。SAU[1]是为了教育目的而使用仿真程序设计的。这种方法有重要的局限性。虽然学生可以使用软件完成和模拟他们的设计,但他们没有机会在实际的硬件中实现和运行他们的设计。本文提出了我们解决这个问题的方法:BZK的FPGA实现。SAU,使其外观和行为类似于[1]中发布的计算机体系结构模拟器。所以我们实现了BZK。SAU计算机体系结构模拟器通过使用Altera®FPGA板,这是一个可重构的硬件原型开发平台。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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