Advanced MOSFET variability and reliability characterization array

Abstract

Time-zero variability, bias temperature instability (BTI) and random telegraph noise (RTN) are issues that both analog and digital designers using scaled CMOS technologies have to face. In order to address them at design time, access to a sufficiently large number of individual devices is required for statistical technology characterization and modeling. In this paper we present a large MOSFET array designed and fabricated in an advanced 28nm technology, containing both nMOS and pMOS devices of different sizes, both single and stacked. Measurement data for time-zero and time-dependent variability are shown and discussed. Large scale transistor arrays are an indispensable tool to accurately capture the statistics of variability and reliability mechanisms in advanced technology nodes.