On calculation of delay range in fault simulation for test cubes

Abstract

This paper proposes a method to compute delay values in 3-valued fault simulation for test cubes which are test patterns with Xs. Because the detectable delay size of each fault by a test cube is fixed after assigning logic values to the Xs in the test cube, the proposed method computes a range of the delay values of the test patterns covered by the test cube. By using the proposed method, we can derive the lowest test quality and the highest test quality of test patterns covered by the test cube.