Rapid design of specific MPSoC prototype within FPGA

Emna Kallel, Y. Aoudni, M. Abid
{"title":"Rapid design of specific MPSoC prototype within FPGA","authors":"Emna Kallel, Y. Aoudni, M. Abid","doi":"10.1109/ICSCS.2009.5412331","DOIUrl":null,"url":null,"abstract":"This paper presents an idea of automatic generation of SoC architecture from a functional specification. Starting from an application task graph, C code will be generated automatically. Then the user can add the specific code of each task. Compilation rules are used in order to have a correct task graph and c code. Finally, an automatic generation of hardware and software SoC architecture will be down to get a new model prototype of the FPGA based SOC platform. We demonstrate the effectiveness of the proposed idea by the implementation of CAGT software tool which can generate efficient and correct C code from a task graph. The generated code is compliant to the ANSI C standard thus can be accepted by most compilers.","PeriodicalId":126072,"journal":{"name":"2009 3rd International Conference on Signals, Circuits and Systems (SCS)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 3rd International Conference on Signals, Circuits and Systems (SCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSCS.2009.5412331","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

This paper presents an idea of automatic generation of SoC architecture from a functional specification. Starting from an application task graph, C code will be generated automatically. Then the user can add the specific code of each task. Compilation rules are used in order to have a correct task graph and c code. Finally, an automatic generation of hardware and software SoC architecture will be down to get a new model prototype of the FPGA based SOC platform. We demonstrate the effectiveness of the proposed idea by the implementation of CAGT software tool which can generate efficient and correct C code from a task graph. The generated code is compliant to the ANSI C standard thus can be accepted by most compilers.
在FPGA内快速设计特定的MPSoC原型
本文提出了一种从功能规范自动生成SoC架构的思想。从应用程序任务图开始,将自动生成C代码。然后用户可以添加每个任务的具体代码。编译规则的使用是为了有一个正确的任务图和c代码。最后,自动生成硬件和软件SoC架构,从而得到基于FPGA的SoC平台的新模型原型。我们通过CAGT软件工具的实现证明了该思想的有效性,该软件工具可以从任务图中生成高效且正确的C代码。生成的代码符合ANSI C标准,因此可以被大多数编译器接受。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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