{"title":"Efficient Kötter-Kschischang Decoder Architectures for Noncoherent Error Control in Random Linear Network Coding","authors":"Jun Lin, Hongmei Xie, Zhiyuan Yan","doi":"10.1109/SIPS.2012.31","DOIUrl":null,"url":null,"abstract":"Kotter-Kschischang (KK) codes are an important family of constant-dimension codes that provide error control in random linear network coding. Two decoding algorithms have been proposed for KK codes: a rank metric decoder and an interpolation based list decoder. Since hardware implementation of the former suffers from limited throughput, long latency and high area complexity, in this paper we propose efficient hardware implementations of the interpolation based list decoder. The decoder architectures in this paper are based on a generalized interpolation algorithm, which has a lower complexity than Gaussian elimination used by rank metric decoder architectures. We also propose a reformulated right division algorithm that is suitable for hardware implementation. Moreover, a serial architecture and an unfolded architecture are proposed for applications with moderate and high throughputs, respectively. The synthesis results show that the proposed architectures are much more efficient than rank metric decoder architectures.","PeriodicalId":286060,"journal":{"name":"2012 IEEE Workshop on Signal Processing Systems","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Workshop on Signal Processing Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2012.31","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Kotter-Kschischang (KK) codes are an important family of constant-dimension codes that provide error control in random linear network coding. Two decoding algorithms have been proposed for KK codes: a rank metric decoder and an interpolation based list decoder. Since hardware implementation of the former suffers from limited throughput, long latency and high area complexity, in this paper we propose efficient hardware implementations of the interpolation based list decoder. The decoder architectures in this paper are based on a generalized interpolation algorithm, which has a lower complexity than Gaussian elimination used by rank metric decoder architectures. We also propose a reformulated right division algorithm that is suitable for hardware implementation. Moreover, a serial architecture and an unfolded architecture are proposed for applications with moderate and high throughputs, respectively. The synthesis results show that the proposed architectures are much more efficient than rank metric decoder architectures.