Towards integration of quadratic placement and pin assignment

J. Westra, P. Groeneveld
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引用次数: 11

Abstract

Pins serve as both the logical and physical interface between two levels in a hierarchical flow. Pin assignment is the placement of pins on the boundary of a chip or macro. Proper pin placement has a large influence on wire length. Experiments indicate a spread in wire length up to over 20%. To address the pin assignment problem, a modification to the well-known and widely used quadratic placement is introduced. This modification allows for the integration between pin assignment and global placement. Wire length within macros is minimized, while top-level considerations such as the relative position of macro and clusters of cells are taken into account in the form of a side assignment. As indicated by experimental results, integration is promising. More research is necessary to fully exploit the ideas in this paper, and assess the practical impact of the approach.
面向二次型布局和引脚分配的集成
在分层流中,引脚既是两个级别之间的逻辑和物理接口。引脚分配是指在芯片或宏的边界上放置引脚。正确的引脚位置对导线长度有很大影响。实验表明,导线长度的差异可达20%以上。为了解决引脚分配问题,引入了一种对众所周知且广泛使用的二次布局的改进。这种修改允许在引脚分配和全局放置之间集成。宏中的连线长度被最小化,而顶层的考虑,比如宏和单元簇的相对位置,则以侧赋值的形式考虑进去。实验结果表明,积分是有希望的。为了充分利用本文的思想,并评估该方法的实际影响,还需要进行更多的研究。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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