Generic neural architecture for LVQ artificial neural networks

Abstract

This paper reports an approach for the implementation of learning vector quantization (LVQ) neural network with different generic architectures and a reduction of the latency. Our approach is based on a hardware/software design (HW/SW) for on-chip and on-line learning with generic architectures. It is based, as well, on a variable topology (the number of neurons in the hidden layer and the number of entries are scalable) that makes it generic and usable for many applications without hardware modifications. In this contribution, we have integrated the parallelism rate into the data path, which is responsible for calculating the minimum distance, weights and labels, in order to solve problems of application latency. Therefore, our approach allows a compromise between latency, power and parallelism. These generic architectures allow enlightening the vision of the designers for the right choice of architecture that suits their needs. These different designs can be used for different applications including applications for vigilance states detection, image processing, EEG signals and ECG signals, etc.