A Reference Buffer with High-Efficiency for High-Speed and High-Precision Switched-Capacitor ADCs

Abstract

A fully integrated reference buffer with high-efficiency for high-speed and high-precision Switched-capacitor ADCs is presented. To reduce hardware and power comsumption, the slow feedback loop and reference generation circuit are combined. And an improved stacked source follower is used to provide low output impedence with low power. The efficient reference buffer is applied to a 12-bit 1Gsps pipeline ADC with amplification phase less than 350ps. The power dissipation of the proposed reference buffer is 56.25mW with 2.5V supply voltage.