Self-aligned RESURF to LOCOS region LDMOS characterization shows excellent R/sub sp/ vs BV performance

Abstract

This paper discusses modeling and experimental development of self-aligned RESURF 60 V rated LDMOS power MOSFETs. The goals of this work were to provide state-of-the-art BV vs. R/sub sp/ performance RESURF devices using existing fabrication techniques capable of high current conduction. The devices were fabricated in a production environment with an additional RESURF implant added to the process. Best performance reported is BV=69 V, and R/sub sp/=0.82 m/spl Omega/ cm/sup 2/ @V/sub gs/=15 V which is the best to our knowledge in this voltage range. Large (18 m/spl Omega/) devices were demonstrated with linear performance up to 60 and 100 A @V/sub gs/=10 V and 15 V respectively. Thick third level metal was used to reduce surface interconnect debiasing.