{"title":"A multiple-valued content-addressable memory using logic-value conversion and threshold functions","authors":"Satoshi Aragaki, T. Hanyu, T. Higuchi","doi":"10.1109/ISMVL.1993.289564","DOIUrl":null,"url":null,"abstract":"A high-density multiple-valued content-addressable memory (MVCAM) for applications such as database systems and pattern recognition is presented. The basic search operations executed in an MVCAM are both the threshold operations in each cell and logic-value conversion against multiple-valued input data. Various multiple-valued operations for data retrieval can be easily performed by programming logic-value conversion. Moreover, the cell circuit can be implemented using two transistors and one capacitor. The cell circuit is used not only to store multilevel charge but also to execute sum calculation by the capacitive coupling technique. As a result, the cell circuit is very simple and the chip area of the cell circuit can be reduced by 54% of that of the equivalent binary implementation.<<ETX>>","PeriodicalId":148769,"journal":{"name":"[1993] Proceedings of the Twenty-Third International Symposium on Multiple-Valued Logic","volume":"148 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1993] Proceedings of the Twenty-Third International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1993.289564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A high-density multiple-valued content-addressable memory (MVCAM) for applications such as database systems and pattern recognition is presented. The basic search operations executed in an MVCAM are both the threshold operations in each cell and logic-value conversion against multiple-valued input data. Various multiple-valued operations for data retrieval can be easily performed by programming logic-value conversion. Moreover, the cell circuit can be implemented using two transistors and one capacitor. The cell circuit is used not only to store multilevel charge but also to execute sum calculation by the capacitive coupling technique. As a result, the cell circuit is very simple and the chip area of the cell circuit can be reduced by 54% of that of the equivalent binary implementation.<>