An efficient PFC voltage regulator with reduced redundant power processing

Abstract

Conventional PFC power supplies employ two cascading stages that deal separately with PFC and voltage regulation. Since power is processed serially by two power stages, the efficiency is limited. In this paper a PFC power supply with improved efficiency is proposed. This circuit makes use of a parallel configuration that reduces unnecessary processing of all power by two stages serially. The circuit is derived from consideration of the power flow between the input, the load and the storage capacitor. A specific circuit implementation is described and the test results are reported.