{"title":"Vectorial multipath channel estimation for the UTRA-TDD mode","authors":"P. Marques, A. Gameiro, J. Fernandes","doi":"10.1109/VTC.2001.956505","DOIUrl":null,"url":null,"abstract":"This paper, deals with channel estimation for UTRA-TDD. Based on the algorithm suggested by the 3GPP for scalar channels, a maximum likelihood (ML) approach for vectorial channel estimation, to include also the estimation of the direction-of-arrival, is proposed. The performance of the algorithm is assessed by resorting to simulations in typical UMTS scenarios, and also by comparing the RMS estimation errors against the Cramer-Rao bound. The results show that good performance is achievable from low to high values of E/sub b//N/sub 0/, provided the path components are separated by more than 2 chips.","PeriodicalId":129008,"journal":{"name":"IEEE 54th Vehicular Technology Conference. VTC Fall 2001. Proceedings (Cat. No.01CH37211)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 54th Vehicular Technology Conference. VTC Fall 2001. Proceedings (Cat. No.01CH37211)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTC.2001.956505","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper, deals with channel estimation for UTRA-TDD. Based on the algorithm suggested by the 3GPP for scalar channels, a maximum likelihood (ML) approach for vectorial channel estimation, to include also the estimation of the direction-of-arrival, is proposed. The performance of the algorithm is assessed by resorting to simulations in typical UMTS scenarios, and also by comparing the RMS estimation errors against the Cramer-Rao bound. The results show that good performance is achievable from low to high values of E/sub b//N/sub 0/, provided the path components are separated by more than 2 chips.