Synchronization using a violation bit in 13.56MHz PJM mode RFID

Abstract

This paper presents a synchronization method for the 18000-3 PJM mode, along with the hardware structure to implement the proposed method. The proposed system detects an incipient peak using a ITS(Initial Time Selector) and a correlator. Once a peak is detected, it starts to demodulate, checking MFM state, until it detects the occurrence of the violation bit, which can acknowledge the payload beginning point. The simulation results verify that the proposed system can dramatically reduce hardware complexity while exhibiting performances comparable to the one recently presented.