Parameterize via structure to resolve high speed discontinuity in PCIe 5 GT/s

Abstract

Via structure can be parameterized into model consisting of lump components. This model can be used for resolving SI issues such as discontinuities on PCIe high speed channel. In this paper, the proposed approach on parameterizing the via has improved the performance of PCIe 5 GT/s channels, consisting of unavoidable VPX connector via stubs, and also hasten the simulation time to resolve via discontinuity.