A 0.75V 30.1 ppm/°C 300nW Bandgap Reference and Low Power Low-dropout Regulator with Hybrid form of Resistors as Size Reduction Technique

Jiteck Jung, Hyun Oh Song, Jungeun Park, H. Kim
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Abstract

This paper proposes a low-power bandgap reference(BGR) and low-dropout regulator(LDO) circuit that apply size reduction technique. Using stacked-MOS transistors in triode region as resistors occupies less layout area than poly resistors with the same resistance. Although the resistance of MOS transistors has wider PVT variations than that of poly resistors, The hybrid form of both MOS resistors and poly resistors can have acceptable PVT variation of resistance with noticeable size reduction. The proposed BGR and LDO with the size reduction technique have the layout size of 0.034mm2 total, which could be 0.050mm2 with poly resistors only. The layout size saving effect is 0.016mm2, which is 31.36% of the total. The proposed BGR produces 0.75V reference voltage with temperature coefficient of 30.1[ppm/°C] over temperature range of −40°C∼125°C. The power consumption is 300nW with layout size of 0.025mm2. The proposed LDO has 0.9V output voltage with input voltage of 2∼3.6V. The operating current is 260nA. The layout size of the LDO is 0.009mm2.
一种0.75V 30.1 ppm/°C 300nW带隙基准和低功率低压差稳压器,采用混合形式电阻作为尺寸减小技术
本文提出了一种采用尺寸减小技术的低功耗带隙参考电路和低差稳压器电路。采用三极管区叠层mos晶体管作为电阻器比采用相同电阻的多晶硅电阻器占用更小的布局面积。虽然MOS晶体管的电阻比多晶硅电阻有更大的PVT变化,但MOS电阻和多晶硅电阻的混合形式可以有可接受的PVT变化,且尺寸明显减小。采用减小尺寸技术的BGR和LDO的总布局尺寸为0.034mm2,而仅采用多晶硅电阻的布局尺寸为0.050mm2。布局尺寸节省效果为0.016mm2,占总量的31.36%。所提出的BGR在- 40°C ~ 125°C的温度范围内产生0.75V参考电压,温度系数为30.1[ppm/°C]。功耗300nW,布局尺寸0.025mm2。该LDO的输出电压为0.9V,输入电压为2 ~ 3.6V。工作电流为260nA。LDO的布局尺寸为0.009mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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