A scalar network analyzer based on detector-log amplifier RFIC chips

M. Alam, C.E. Smith
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Abstract

The objective of this paper is to present the design, development, and implementation of a low-cost, compact, and moderately accurate Scalar Network Analyzer (SNA) using two radio frequency integrated circuit (RFIC) detector-logarithmic (or detector-log) and limiting IF (intermediate frequency) amplifier chips. The AD8309 is one such advanced detector-log and limiting amplifier RFIC chip that is used in this development. The primacy function of a scalar network analyzer is to take the ratio of the incident signal and the transmitted or reflected signal in order to determine the magnitude characteristics of various active and passive microwave devices. Using the detector-log RFIC chip makes it simple because it defects the envelope of the input RF (radio frequency) signal and converts it into a logarithmic dc (direct current) output voltage. This logarithmic transformation makes the ratio calculations much easier because the ratios become the difference of two log type voltages (log A/B=log A-log B). The proposed SNA has an operating frequency of 50 MHz to 520 MHz and has a dynamic range of greater than 50 dB.
基于检测-对数放大器RFIC芯片的标量网络分析仪
本文的目的是介绍使用两个射频集成电路(RFIC)检测器-对数(或检测器-对数)和限制中频(中频)放大器芯片的低成本,紧凑和中等精度的标量网络分析仪(SNA)的设计,开发和实现。AD8309是一种先进的检测-日志和限制放大器RFIC芯片,用于此开发。标量网络分析仪的首要函数是取入射信号与发射或反射信号的比值,以确定各种有源和无源微波器件的幅度特性。使用检测器-对数RFIC芯片使其变得简单,因为它对输入RF(射频)信号的包络进行缺陷处理,并将其转换为对数直流(直流)输出电压。这种对数变换使比值计算变得更加容易,因为比值变成了两个对数型电压的差(log A/B=log A-log B)。所提出的SNA工作频率为50mhz至520mhz,动态范围大于50db。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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