On system-level use of BIST for programmable Input/Output buffers in FPGAs

Bradley F. Dutton, L. Lerner, S. Vemula, C. Stroud
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Abstract

We describe a Built-in Self-Test (BIST) approach that was developed for the programmable Input/Output (I/O) buffers in Field Programmable Gate Arrays (FPGAs). The approach is unique when compared with previous work because the I/O buffers are tested separately from the other programmable logic in the I/O cells. The capabilities and limitations of system-level use of this I/O buffer BIST are discussed in conjunction with experimental results from the implementation and actual use of the approach in systems.
fpga中可编程输入/输出缓冲器的系统级使用
我们描述了一种内置自检(BIST)方法,该方法是为现场可编程门阵列(fpga)中的可编程输入/输出(I/O)缓冲区开发的。与以前的工作相比,这种方法是独特的,因为I/O缓冲与I/O单元中的其他可编程逻辑分开测试。系统级使用这种I/O缓冲器BIST的能力和限制,结合系统中该方法的实现和实际使用的实验结果进行了讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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