Bradley F. Dutton, L. Lerner, S. Vemula, C. Stroud
{"title":"On system-level use of BIST for programmable Input/Output buffers in FPGAs","authors":"Bradley F. Dutton, L. Lerner, S. Vemula, C. Stroud","doi":"10.1109/SECON.2010.5453818","DOIUrl":null,"url":null,"abstract":"We describe a Built-in Self-Test (BIST) approach that was developed for the programmable Input/Output (I/O) buffers in Field Programmable Gate Arrays (FPGAs). The approach is unique when compared with previous work because the I/O buffers are tested separately from the other programmable logic in the I/O cells. The capabilities and limitations of system-level use of this I/O buffer BIST are discussed in conjunction with experimental results from the implementation and actual use of the approach in systems.","PeriodicalId":286940,"journal":{"name":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.2010.5453818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We describe a Built-in Self-Test (BIST) approach that was developed for the programmable Input/Output (I/O) buffers in Field Programmable Gate Arrays (FPGAs). The approach is unique when compared with previous work because the I/O buffers are tested separately from the other programmable logic in the I/O cells. The capabilities and limitations of system-level use of this I/O buffer BIST are discussed in conjunction with experimental results from the implementation and actual use of the approach in systems.