Hardware-Efficient Architecture for Generalized Voronoi Diagram Construction Using a Prediction-Correction Approach

L. Vachhani, K. Sridharan
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引用次数: 5

Abstract

This paper presents a hardware-efficient scheme to con- struct sensor-based Generalized Voronoi Diagram (GVD) of an indoor environment. An architecture to construct the GVD using a prediction and correction strategy is pre- sented. The approach is based on processing distance infor- mation from ultrasonic sensors. A feature of the proposed approach is that it does not involve operations that are ex- pensive in hardware. Results of FPGA implementation are also presented. The design is shown to be space efficient and fits in a low-end FPGA device (with a small number of system gates). Keywords: Generalized Voronoi Diagram (GVD), Ultra- sonic sensors, Prediction and Correction Strategy, Architec- ture, Field Programmable Gate Array (FPGA), Robotics
基于预测校正方法的通用Voronoi图构造的硬件高效架构
本文提出了一种基于传感器的室内环境广义Voronoi图(GVD)的硬件高效构建方案。提出了一种利用预测和校正策略构建GVD的体系结构。该方法基于对超声传感器距离信息的处理。所提出的方法的一个特点是它不涉及昂贵的硬件操作。最后给出了FPGA的实现结果。该设计具有空间效率,适合低端FPGA器件(具有少量系统门)。关键词:广义Voronoi图(GVD)、超声波传感器、预测与校正策略、体系结构、现场可编程门阵列(FPGA)、机器人技术
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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