{"title":"Comparative Analog Analysis of Si, Ge and Si0.7Ge0.3 Channel Based DG-JLFET","authors":"Ankita Porwal, Chitrakant Sahu, C. Periasamy","doi":"10.1109/iSES52644.2021.00025","DOIUrl":null,"url":null,"abstract":"In this paper; a p-type double gate junctionless field effect transistor (DG-JLFET) based on Silicon (Si), germanium(Ge), and silicon-germanium $\\left(S i_{0.7} \\mathrm{Ge}_{0.3}\\right)$ are investigated for analog/RF application. This paper aims to improve the performance of the DG-JLFET for analog and high-speed digital applications based on Moores law by introducing Ge and SiGe as channel materials and compare with conventional Si-based DG-JLFET. The electrical properties like carrier mobility and saturation voltage can be modulated by adjusting the mole fraction in compound semiconductor materials like SiGe. The optimized values of mobility and saturation voltage of SiGe have for their applicability in junctionless transistors has been found at $\\mathrm{S} S i_{0.7} \\mathrm{Ge}_{0.3}$. The simulated results infer that the performance of $S i_{0.7} G e_{0.3}$ based JLFET is better than that of Si-based DGJLFET yielding twofold increment in transconductance $\\left(g_{m}\\right)$, 1.4 times higher cut-off frequency $\\left(f_{T}\\right), 1.4$ times capacitance ratio $\\left(\\frac{C_{g s}}{C_{g d}}\\right), 2.3$ times early voltage (VEA), and 2 times output conductance $\\left(g_{d s}\\right)$. The results establish the potential advantages of compound semiconductor materials for their applicability in advanced field effect transistors.","PeriodicalId":293167,"journal":{"name":"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/iSES52644.2021.00025","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper; a p-type double gate junctionless field effect transistor (DG-JLFET) based on Silicon (Si), germanium(Ge), and silicon-germanium $\left(S i_{0.7} \mathrm{Ge}_{0.3}\right)$ are investigated for analog/RF application. This paper aims to improve the performance of the DG-JLFET for analog and high-speed digital applications based on Moores law by introducing Ge and SiGe as channel materials and compare with conventional Si-based DG-JLFET. The electrical properties like carrier mobility and saturation voltage can be modulated by adjusting the mole fraction in compound semiconductor materials like SiGe. The optimized values of mobility and saturation voltage of SiGe have for their applicability in junctionless transistors has been found at $\mathrm{S} S i_{0.7} \mathrm{Ge}_{0.3}$. The simulated results infer that the performance of $S i_{0.7} G e_{0.3}$ based JLFET is better than that of Si-based DGJLFET yielding twofold increment in transconductance $\left(g_{m}\right)$, 1.4 times higher cut-off frequency $\left(f_{T}\right), 1.4$ times capacitance ratio $\left(\frac{C_{g s}}{C_{g d}}\right), 2.3$ times early voltage (VEA), and 2 times output conductance $\left(g_{d s}\right)$. The results establish the potential advantages of compound semiconductor materials for their applicability in advanced field effect transistors.