On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs

Aurelio Morales-Villanueva, A. Gordon-Ross
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引用次数: 17

Abstract

Partial reconfiguration (PR) of field-programmable gate arrays (FPGAs) enables hardware tasks to time multiplex PR regions (PRRs) by isolating reconfiguration to only the reconfigured PRR, which avoids halting the entire FPGA's execution. Time multiplexing PRRs requires support for unloading/loading tasks and for resuming a task's execution state. In order to resume a task's execution state, the execution state (context) must be saved when the task is unloaded so that the execution state can be restored when the task resumes- context save (CS) and context restore (CR), respectively. In this paper, we present a software-based, on-chip context save and restore (CSR) for PR-capable FPGAs. As compared to prior work, our CSR is autonomous (i.e., does not require any external host support), does not require custom on-chip hardware, is portable across any system design, and does not require tool flow modifications or special tools. Experimental results extensively evaluate the CSR execution time based on PRR size, enabling designers to trade off PRR granularity for CSR execution time based on application requirements.
部分可重构fpga上硬件任务的片上上下文保存与恢复
现场可编程门阵列(FPGA)的部分重构(PR)通过将重构隔离到重新配置的PRR,从而使硬件任务能够对多路PR区域(PRR)进行定时,从而避免了整个FPGA的执行中断。时间复用PRRs需要支持卸载/加载任务和恢复任务的执行状态。为了恢复任务的执行状态,必须在任务卸载时保存执行状态(上下文),以便在任务恢复时恢复执行状态-分别为上下文保存(CS)和上下文恢复(CR)。在本文中,我们提出了一种基于软件的片上上下文保存和恢复(CSR),用于具有pr功能的fpga。与之前的工作相比,我们的CSR是自主的(即,不需要任何外部主机支持),不需要定制的片上硬件,可移植到任何系统设计中,不需要修改工具流程或特殊工具。实验结果广泛评估了基于PRR大小的CSR执行时间,使设计人员能够根据应用程序需求在PRR粒度与CSR执行时间之间进行权衡。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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