{"title":"Enhanced hole drift velocity in sub-0.1 /spl mu/m Si devices caused by anisotropic velocity overshoot","authors":"Y. Tagawa, Y. Awano","doi":"10.1109/IWCE.1998.742748","DOIUrl":null,"url":null,"abstract":"We performed for the first time full band Monte Carlo simulations of anisotropic hole transport in sub-0.1 /spl mu/m Si devices. We found from this simulation of 0.05 /spl mu/m channel p-i-p diodes that the hole drift velocity in the channel with the orientation of <100> with respect to crystallographic direction is enhanced by the velocity overshoot effect, and that the average velocity in the middle of the channel is 25% higher than for a diode in <110> direction at room temperature. These results suggest that the current drive capability of sub-0.1 /spl mu/m pMOSFETs could be optimized by choosing the channel orientation in the <100> direction.","PeriodicalId":357304,"journal":{"name":"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWCE.1998.742748","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We performed for the first time full band Monte Carlo simulations of anisotropic hole transport in sub-0.1 /spl mu/m Si devices. We found from this simulation of 0.05 /spl mu/m channel p-i-p diodes that the hole drift velocity in the channel with the orientation of <100> with respect to crystallographic direction is enhanced by the velocity overshoot effect, and that the average velocity in the middle of the channel is 25% higher than for a diode in <110> direction at room temperature. These results suggest that the current drive capability of sub-0.1 /spl mu/m pMOSFETs could be optimized by choosing the channel orientation in the <100> direction.