Runtime Power Limiting of Parallel Applications on Intel Xeon Phi Processors

Abstract

Energy-efficient computing is crucial to achieving exascale performance. Power capping and dynamic voltage/frequency scaling may be used to achieve energy savings. The Intel Xeon Phi implements a power capping strategy, where power thresholds are employed to dynamically set voltage/frequency at the runtime. By default, these power limits are much higher than the majority of applications would reach. Hence, this work aims to set the power limits according to the workload characteristics and application performance. Certain models, originally developed for the CPU performance and power, have been adapted here to determine power-limit thresholds in the Xeon Phi. Next, a procedure to select these thresholds dynamically is proposed, and its limitations outlined. When this runtime procedure along with static power-threshold assignment were compared with the default execution, energy savings ranging from 5% to 49% were observed, mostly for memory-intensive applications.