Two methods to enhance the master thread's performance in SMT Chip

Abstract

In SMT processor, every thread's executing time will be enlarged due to sharing resource by several threads. It will result in task lost in real time system. In this paper, we present two methods to alleviate the cache conflict in multithread chip, one is protecting the last instructions of master thread, and the other is locking loop. Both methods only need several additional registers. Simulations show that not only the performance of master thread is improved by 14%, but also the IPC of all threads is improved about 6%.