Efficient Table-Based Polynomial on FPGA

Marco Barbone, B. W. Kwaadgras, U. Oelfke, W. Luk, G. Gaydadjiev
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引用次数: 2

Abstract

Field Programmable Gate Arrays (FPGAs) are gaining popularity in the context of scientific computing due to the recent advances of High-Level Synthesis (HLS) toolchains for customised hardware implementations combined with the increase in computing capabilities of modern FPGAs. As a result, developers are able to implement more complex scientific workloads which often require the evaluation of univariate numerical functions. In this study, we propose a methodology for table-based polynomial interpolation aiming at producing area-efficient implementations of such functions on FPGAs achieving the same accuracy and at similar performance as direct implementations. We also provide a rigorous error analysis to guarantee the correctness of the results. Our methodology covers the forecast of resource utilisation of the polynomial interpolator and, based on the characteristics of the function, guides the developer to the most area-efficient FPGA implementation. Our experiments show that in the case of a radiation spectrum of a Black Body application based on evaluating Planck’s Law, it is possible to reduce resource utilisation by up to 90% when compared to direct implementations not using table-based methods. Moreover, when only the kernels are considered, our method uses up to two orders of magnitude fewer resources with no performance penalties. Based on previous more theoretical works, our study investigates practical applications of table-based methods in the context of high performance and scientific computing where it is used to implement common but more complex functions than the elementary functions widely studied in the related literature.
基于FPGA的高效表多项式
现场可编程门阵列(fpga)在科学计算的背景下越来越受欢迎,这是由于用于定制硬件实现的高级综合(HLS)工具链的最新进展,以及现代fpga计算能力的提高。因此,开发人员能够实现更复杂的科学工作负载,这些工作负载通常需要对单变量数值函数进行评估。在本研究中,我们提出了一种基于表的多项式插值方法,旨在在fpga上实现这些函数的面积高效实现,实现与直接实现相同的精度和相似的性能。我们还提供严格的误差分析,以保证结果的正确性。我们的方法涵盖了多项式插值器的资源利用预测,并基于函数的特性,指导开发人员实现最具面积效率的FPGA。我们的实验表明,在基于评估普朗克定律的黑体应用的辐射谱的情况下,与不使用基于表的方法的直接实现相比,有可能将资源利用率降低高达90%。此外,当只考虑内核时,我们的方法使用的资源最多减少了两个数量级,而且没有性能损失。基于先前更多的理论工作,我们的研究探讨了基于表的方法在高性能和科学计算背景下的实际应用,它被用来实现比相关文献中广泛研究的基本函数更常见但更复杂的函数。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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