Compiling and optimizing image processing algorithms for FPGAs

Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI:10.1109/CAMP.2000.875981

B. Draper, W. Najjar, Wim Böhm, J. Hammes, Bob Rinker, C. Ross, M. Chawathe, J. Bins

引用次数: 36

Abstract

This paper presents a high-level language for expressing image processing algorithms, and an optimizing compiler that targets FPGAs. The language is called SA-C, and this paper focuses on the language features that 1) support image processing, and 2) enable efficient compilation to FPGAs. It then describes the compilation process, in which SA-C algorithms are translated into non-recursive data flow graphs, which in turn are translated into VHDL. Finally, it presents performance numbers for some well-known image processing routines, written in SAC and automatically compiled to an Annapolis Microsystems WildForce board with Xilinx 4036XL FPGAs.

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编译和优化 FPGA 图像处理算法

本文介绍了一种用于表达图像处理算法的高级语言，以及一种针对 FPGA 的优化编译器。该语言被称为 SA-C，本文重点介绍了该语言的以下特点：1）支持图像处理；2）能够高效地编译到 FPGA。然后介绍了编译过程，在这一过程中，SA-C 算法被转换为非递归数据流图，而非递归数据流图又被转换为 VHDL。最后，它给出了一些著名图像处理例程的性能数据，这些例程是用 SAC 编写的，并自动编译到带有 Xilinx 4036XL FPGA 的 Annapolis Microsystems WildForce 板上。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception

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