R. Griessl, M. Peykanu, J. Hagemeyer, Mario Porrmann, S. Krupop, M. Berge, Thomas Kiesel, Wolfgang Christmann
{"title":"A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters","authors":"R. Griessl, M. Peykanu, J. Hagemeyer, Mario Porrmann, S. Krupop, M. Berge, Thomas Kiesel, Wolfgang Christmann","doi":"10.1109/EUC.2014.29","DOIUrl":null,"url":null,"abstract":"Increasing the energy efficiency of today's high-performance computing systems requires new approaches that go beyond homogeneous architectures, which primarily target maximum performance per node. Heterogeneous architectures that can be tailored towards the specific needs of a particular application are a promising alternative to state-of-the-art server systems. In this paper, we present a novel highly-scalable server architecture that seamlessly integrates variable combinations of general purpose CPUs, embedded CPUs, FPGAs, and GPUs. Embedded CPUs based on the latest ARM Cortex-A15 devices with integrated embedded GPUs are combined with FPGA-based reconfigurable SoCs, which can be used for application-specific hardware acceleration. A dedicated monitoring network enables continuous control and fine-grained observation of all relevant system parameters. Communication between the compute nodes is established by a flexible multi-level interconnect that can be adapted to various Ethernet and Infiniband standards. The communication facilities are further enhanced by direct high-bandwidth, low-latency links between the embedded FPGA-based reconfigurable SoCs.","PeriodicalId":331736,"journal":{"name":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 12th IEEE International Conference on Embedded and Ubiquitous Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUC.2014.29","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 26
Abstract
Increasing the energy efficiency of today's high-performance computing systems requires new approaches that go beyond homogeneous architectures, which primarily target maximum performance per node. Heterogeneous architectures that can be tailored towards the specific needs of a particular application are a promising alternative to state-of-the-art server systems. In this paper, we present a novel highly-scalable server architecture that seamlessly integrates variable combinations of general purpose CPUs, embedded CPUs, FPGAs, and GPUs. Embedded CPUs based on the latest ARM Cortex-A15 devices with integrated embedded GPUs are combined with FPGA-based reconfigurable SoCs, which can be used for application-specific hardware acceleration. A dedicated monitoring network enables continuous control and fine-grained observation of all relevant system parameters. Communication between the compute nodes is established by a flexible multi-level interconnect that can be adapted to various Ethernet and Infiniband standards. The communication facilities are further enhanced by direct high-bandwidth, low-latency links between the embedded FPGA-based reconfigurable SoCs.