A low-power reconfigurable data-flow driven DSP system

M. Wan, Hui Zhang, M. Benes, J. Rabaey
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引用次数: 6

Abstract

Reconfigurable architectures have emerged as a promising implementation platform to provide high-flexibility, high-performance, and low-power solutions for future wireless embedded devices. We discuss in details a reconfigurable data-flow driven architecture, including the computation model, communication mechanism, and implementation. We also describe a set of software tools developed to perform automatic mapping from algorithms to the architecture, as well as to evaluate the resulting performance and energy of the mapping. Finally, we present results on digital signal processing and wireless communication algorithms to show the energy efficiency of the system and the effectiveness of the tools. Our system shows more than one order of magnitude of improvement in terms of energy efficiency when compared to low-power programmable processors.
一个低功耗可重构数据流驱动的DSP系统
可重构架构已经成为一个很有前途的实现平台,为未来的无线嵌入式设备提供高灵活性、高性能和低功耗的解决方案。详细讨论了一种可重构数据流驱动的体系结构,包括计算模型、通信机制和实现。我们还描述了一组软件工具,用于执行从算法到体系结构的自动映射,以及评估映射的最终性能和能量。最后,我们给出了数字信号处理和无线通信算法的结果,以显示系统的能源效率和工具的有效性。与低功耗可编程处理器相比,我们的系统在能源效率方面显示出超过一个数量级的改进。
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