Energy-Optimized Static Scheduling for Many-Cores with Task Parallelization, DVFS and Core Consolidation

Abstract

We demonstrate how static, energy-efficient, compiler-generated schedules for independent, parallelizable tasks on parallel machines can be improved by modeling idle power. We assume that the static power consumption of a core comprises a notable fraction of the core's total power, which is more and more often the case. The improvement is achieved by optimally packing cores when deciding about core allocation, mapping and DVFS for each task so that all unused cores can be switched off and overall energy usage is minimized. We evaluate our proposal with a benchmark suite of task collections, and compare the resulting schedules with an optimal scheduler that does not take idle power and core switch-off into account. We find that we can reduce energy consumption by 66% for mostly sequential tasks on many cores and by up to 91% for a realistic multicore processor model.