Symbolic DDD-based tool for the computation of noise in CMOS analog circuits

Abstract

In this paper we present a tool based on determinant decision diagrams (DDDs) for the automatic generation of exact fully-symbolic noise expressions of analog integrated circuits containing MOSFETs. The formulation of the circuit equations is performed through modeling all MOSFETs with their nullor equivalents and by applying symbolic nodal analysis. The derived exact fully-symbolic noise expressions are evaluated from HSPICE™ simulations using the related noise equations for NLEV 0, 1 and 2. We show the good agreement between the derived symbolic-expressions and HSPICE™. Another advantage of our proposed DDD-based tool relies on its capability to compute the voltage noise generated at each circuit node, and in a simple post-processing step it can compute the current noise at each circuit branch.