Hsueh-Yen Shen, Yu-Chi Lee, Tzu-Wei Tong, Chia-Hsiang Yang
{"title":"4.7 A 91mW 90fps Super-Resolution Processor for Full HD Images","authors":"Hsueh-Yen Shen, Yu-Chi Lee, Tzu-Wei Tong, Chia-Hsiang Yang","doi":"10.1109/ISSCC42613.2021.9366026","DOIUrl":null,"url":null,"abstract":"Super resolution is the process of reconstructing a high-resolution (HR) image from a low-resolution (LR) one. Super-resolution technology enables high-resolution video streaming, image zoom-in, and far object recognition. Fig. 4.7.1 shows such an application scenario. The details of the videos/images can be reconstructed and projected to a higher-resolution screen, thereby providing a better visual experience. A hardware accelerator is needed to speed up the super-resolution process to support real-time high-resolution video streaming. Conventionally, dictionary-based approaches, such as ANR/GR [1] and A+ [2], convert the LR image into the HR one from learned mapping functions. Neural network (NN)-based algorithms generate better-quality super-resolution images by extracting features from training [3]. However, the complexity of the dictionary-based and the NN-based algorithms is excessively high, making them unsuitable for high-speed applications [4]. A rapid and accurate image super resolution (RAISR) algorithm [4] is proposed to achieve comparable quality with a much faster processing speed when compared to the previous solutions. It employs pre-learned filters to enhance the image quality based on bicubic interpolation. A pre-learned filter (also known as kernel) is selected by a hash function to address the structure-related details.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC42613.2021.9366026","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Super resolution is the process of reconstructing a high-resolution (HR) image from a low-resolution (LR) one. Super-resolution technology enables high-resolution video streaming, image zoom-in, and far object recognition. Fig. 4.7.1 shows such an application scenario. The details of the videos/images can be reconstructed and projected to a higher-resolution screen, thereby providing a better visual experience. A hardware accelerator is needed to speed up the super-resolution process to support real-time high-resolution video streaming. Conventionally, dictionary-based approaches, such as ANR/GR [1] and A+ [2], convert the LR image into the HR one from learned mapping functions. Neural network (NN)-based algorithms generate better-quality super-resolution images by extracting features from training [3]. However, the complexity of the dictionary-based and the NN-based algorithms is excessively high, making them unsuitable for high-speed applications [4]. A rapid and accurate image super resolution (RAISR) algorithm [4] is proposed to achieve comparable quality with a much faster processing speed when compared to the previous solutions. It employs pre-learned filters to enhance the image quality based on bicubic interpolation. A pre-learned filter (also known as kernel) is selected by a hash function to address the structure-related details.