Exploring Versatility of Primary Visual Cortex Inspired Feature Extraction Hardware Model through Various Network Architectures

Abstract

Improving the performance of the network architectures that mimic brain operation is a research trend. Optimizing the latency on hardware circuits of the artificial neural network continues investigating. In the third generation, the Spiking Neural Networks (SNNs) with biological plausibility and similarity to the functionality of the human brain are emerging. A more comprehensive study is expected to understand the inherent behavior of SNNs, especially under adversarial attacks. This study concatenates the proposed SLIT layer with the convolutional neural networks (CNNs) to degrade the latency of deep neural networks on the hardware platform. The input data modified with the SLIT layer is applied to interrogate the adversarial attack on Spiking Neural Network. We estimate new topology with MNIST and CIFAR-10 datasets. Latency of the inference phase on CNNs for image classification application is assessed on the chip ZC7Z020-1CLG484C FPGA. Reducing latency in the range of 2.6% to 16% is observed from the Vitis AI platform. With white-box adversarial attack applications on SNNs, the accuracy of the proposal is approximately 70% higher robustness than the previous works.