300mm copper low-k integration and reliability for 90 and 65 nm nodes

S. Parikh, M. Naik, R. Hung, H. Dai, D. Padhi, L. Zhang, T. Pan, Kuo-Wei Liu, G. Dixit, M. Armacost
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引用次数: 1

Abstract

The paper addresses critical issues associated with 90 and 65 nm copper low k interconnects. A stable baseline with >98% yield on 1E7via and 5m long serpent was established. Electromigration (EM) and IV breakdown performance was improved by optimizing the post CMP Cu pre-treatment and the dielectric barrier obtaining EM T/sub 0.1/ lifetime of greater than 10 yrs at 1.5 MA/cm/sup 2/ and >6MV/cm IV breakdown field. Detailed characterization of the impact of the barrier process on stress migration (SM) is presented. Extendibility of the process flow to sub-90nm interconnects and advanced dielectric (k<2.7) is shown.
300mm铜低k集成度和可靠性,适用于90和65纳米节点
本文解决了与90 nm和65 nm铜低k互连相关的关键问题。建立了1E7via和5m长蛇条产量>98%的稳定基线。通过优化CMP后Cu预处理和介质阻挡层,在1.5 MA/cm/sup 2/和>6MV/cm的IV击穿场下,获得了EM T/sub 0.1/寿命大于10年的电迁移(EM)和IV击穿性能。详细描述了屏障过程对应力迁移(SM)的影响。该工艺流程可扩展到90nm以下的互连和高级介电(k<2.7)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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