4 Transistor and 2 memristor based memory

Abstract

This research proposed a new type of memory cell designed by using only nMOS transistors of 16nm, 22nm and 45nm (Arizona State University Predictive Technologies Model) PTM models and memristors. The memory cell consumes less power and also occupies minimum amount of silicon area. The stability of the data during successive read operation and noise margin are in the promising range. Extensive simulation results demonstrate the validity and competency of the proposed model in the sector of time delay, static noise margin and power consumption.