Design of novel high speed dual-modulus prescaler based on new optimized structure

Abstract

A kind of novel method is discussed to design the high speed prescaler in GHz frequency-hopping PLL frequency synthesizer. The structure of the dual-modulus prescaler (DMP) is optimized and a novel high speed D-latch integrated with multiple-input OR gate is used. The improved structure can make all separated logic gates be integrated with correlative D flip-flops completely. The circuit can work stably and accurately under all kinds of simulation condition such as different process corners. It is fabricated in 0.18μm mixed-signal CMOS technology. The measured results show that the high speed prscaler 's operating frequency range is 2.25~ 2.75GHz in 1.8V power supply, the current consumption is 5.4mA (including buffer) and higher speed and lower power dissipation are obtained.