NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning

Sangbum Kim, M. Ishii, S. Lewis, T. Perri, M. BrightSky, Wanki Kim, R. Jordan, G. Burr, N. Sosa, A. Ray, Jin P. Han, Christopher P. Miller, K. Hosokawa, C. Lam
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引用次数: 152

Abstract

We demonstrate a neuromorphic core with 64k-cell phase change memory (PCM) synaptic array (256 axons by 256 dendrites) with in-situ learning capability. 256 configurable on-chip neuron circuits perform leaky integrate and fire (LIF) and synaptic weight update based on spike-timing dependent plasticity (STDP). 2T-1R PCM unit cell design separates LIF and STDP learning paths, minimizing neuron circuit size. The circuit implementation of STDP learning algorithm along with 2T-1R structure enables both LIF and STDP learning to operate asynchronously and simultaneously within the array, avoiding additional complication and power consumption associated with timing schemes. We show hardware demonstration of in-situ learning with large representational capacity, enabled by large array size and analog synaptic weights of PCM cells.
具有64k细胞(256 × 256)相变记忆突触阵列的NVM神经形态核心,具有片上神经元电路,用于连续原位学习
我们展示了一个具有64k细胞相变记忆(PCM)突触阵列(256个轴突,256个树突)的具有原位学习能力的神经形态核心。256个可配置的片上神经元电路基于峰值时间依赖的可塑性(STDP)进行泄漏集成和触发(LIF)和突触权更新。2T-1R PCM单元设计分离LIF和STDP学习路径,最大限度地减少神经元电路的大小。STDP学习算法的电路实现以及2T-1R结构使LIF和STDP学习在阵列内异步和同时运行,避免了与时序方案相关的额外复杂性和功耗。我们展示了具有大表征能力的原位学习的硬件演示,这是由PCM细胞的大阵列尺寸和模拟突触权重实现的。
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