On hardware solution of dense linear systems via Gauss-Jordan Elimination

M. Tarek, Ibnu Ziad, Y. Alkabani, M. Watheq El-Kharashi
{"title":"On hardware solution of dense linear systems via Gauss-Jordan Elimination","authors":"M. Tarek, Ibnu Ziad, Y. Alkabani, M. Watheq El-Kharashi","doi":"10.1109/PACRIM.2015.7334863","DOIUrl":null,"url":null,"abstract":"Gauss-Jordan Elimination (GJE) is a popular method for solving systems of linear equations. Much work has been done to design high throughput, low cost, FPGA-based architectures for GJE. However, as the interest in energy efficient designs increases, power consumption becomes a prevalent metric that must be considered in any FPGA-based implementation. In this paper, we present a scalable architecture that can efficiently solve any generic system of linear equations using GJE with a single-precision floating-point accuracy and reasonable power and area overheads. Comparisons with two previous implementations show the efficiency of our design.","PeriodicalId":350052,"journal":{"name":"2015 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACRIM.2015.7334863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Gauss-Jordan Elimination (GJE) is a popular method for solving systems of linear equations. Much work has been done to design high throughput, low cost, FPGA-based architectures for GJE. However, as the interest in energy efficient designs increases, power consumption becomes a prevalent metric that must be considered in any FPGA-based implementation. In this paper, we present a scalable architecture that can efficiently solve any generic system of linear equations using GJE with a single-precision floating-point accuracy and reasonable power and area overheads. Comparisons with two previous implementations show the efficiency of our design.
稠密线性系统高斯-约当消元的硬件解
高斯-约当消去法是求解线性方程组的一种常用方法。为GJE设计高吞吐量、低成本、基于fpga的架构已经做了很多工作。然而,随着对节能设计的兴趣增加,功耗成为任何基于fpga的实现中必须考虑的普遍指标。在本文中,我们提出了一个可扩展的架构,它可以有效地求解任何通用的线性方程组,使用GJE具有单精度浮点精度和合理的功耗和面积开销。与之前两个实现的比较显示了我们设计的效率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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