Sung-Kun Park, Kwang-il Choi, Nam-Yoon Kim, Jung-Hoon Kim, Young-Jun Kwon, Kwangsik Ko, I. Cho, K. Yoo
{"title":"Single-Poly Embedded NVM Solution for Analog Trimming and Code Storage Applications","authors":"Sung-Kun Park, Kwang-il Choi, Nam-Yoon Kim, Jung-Hoon Kim, Young-Jun Kwon, Kwangsik Ko, I. Cho, K. Yoo","doi":"10.1109/IMW.2015.7150304","DOIUrl":null,"url":null,"abstract":"We report a single-poly embedded nonvolatile memory (eNVM) solution for analog trimming and code storage applications using a 0.13-μm BCDMOS process. Each cell has its own merits and demerits, depending on structure and operation methods. For analog trimming purposes, a conventional n-well coupling Fowler-Nordheim tunneling cell with a large unit cell size of 88 μm2 is used. On the other hand, a select gate lateral coupling (SGLC) cell for code storage purposes has a much smaller unit cell size of 2.82 μm2, which is comparable to the size of SRAM. The SGLC cell is fabricated using a combination of only 1.5-V and 5-V transistor-related processes for channel hot electron injection programming. The SGLC cell exhibits a high programming speed of 100 μs and is over-erase-free, which is suitable for a NOR array structure. In addition, both cells also had a retention lifetime of more than 10 years. Thus, these cells can be fabricated to match the requirements of various eNVM applications.","PeriodicalId":107437,"journal":{"name":"2015 IEEE International Memory Workshop (IMW)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2015.7150304","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
We report a single-poly embedded nonvolatile memory (eNVM) solution for analog trimming and code storage applications using a 0.13-μm BCDMOS process. Each cell has its own merits and demerits, depending on structure and operation methods. For analog trimming purposes, a conventional n-well coupling Fowler-Nordheim tunneling cell with a large unit cell size of 88 μm2 is used. On the other hand, a select gate lateral coupling (SGLC) cell for code storage purposes has a much smaller unit cell size of 2.82 μm2, which is comparable to the size of SRAM. The SGLC cell is fabricated using a combination of only 1.5-V and 5-V transistor-related processes for channel hot electron injection programming. The SGLC cell exhibits a high programming speed of 100 μs and is over-erase-free, which is suitable for a NOR array structure. In addition, both cells also had a retention lifetime of more than 10 years. Thus, these cells can be fabricated to match the requirements of various eNVM applications.