Implementation of Braun and Baugh-Wooley Multipliers Using QCA

Abstract

Matrix multiplication is a key element in digital signal processing systems, as well as a repetitive procedure in several signal processing and computing tasks. The circuit complexity is mostly determined by the number of multiplications necessary to create the system. A parallel array multiplier is a method for meeting high execution speed requirements. In the last step of a standard Braun multiplier, there is an assembly containing 16 AND gates, 9 Full Adders, as well as a ripple carry adder (RCA). Researchers studied other 4nano devices as an alternative to CMOS since circuits are constrained by technological scalability. Quantum-dot Cellular Automata (QCA) system is really a viable alternative to CMOS technology in a variety of nano devices. It is appealing because of its quick speed, small size, with low power consumption. The creation of a small and high-speed Baugh Wooley multiplier utilizing Quantum Dot Cellular Automata is presented in this study. In DSP processors, multipliers are the fundamental building elements of many calculations. Various adder as well as multiplier models on QCA have already been presented, however there has been little effort done on signed multiplication. This paper utilizes the unique QCA characteristics to design a Baugh-Wooley Multiplier that is fast and efficient to implement both signed and unsigned multiplication and comparison will be done with present implemented multipliers. Multiplication is the basic building block for several DSP processors, Image processing and many other. QCA Designer is used to display simulation results. The computational complexity of algorithms employed inside Digital Signal Processors (DSPs) has significantly grown over time. Braun design is a simulation model of a similar array multiplier. A parallel array multiplier is a form of Braun multiplier. Braun multiplier architecture comprises mainly multiple Carry Save Adders, an array of AND gates, and a Ripple Carry Adder.