Thermal optimization of a flip-chip WiFi RF front-end IC

Abstract

Flip-chip designs offer several advantages over traditional designs. However, thermal characteristics must be considered carefully, or the end result may have high junction temperatures and thus poor performance and poor reliability. This paper presents some guidelines for thermal optimization in flip-chip designs, and presents the results of a flip-chip single die WiFi FEM developed using Bi-FET (HBT+E/D-PHEMT) technology. In this design, both solder bumps and copper pillar bumps were developed for the flip chip process.