A (31,15) Reed-Solomon code for large memory systems

Abstract

This paper describes the encoding and the decoding of a (31,15) Reed-Solomon Code for multiple-burst error correction for large memory systems. The decoding procedure consists of four steps—(1) syndrome calculation, (2) error-location polynomial calculation, (3) error-location numbers calculation and (4) error values calculation. The principal features of the design are the use of a hardware shift register for both high-speed encoding and syndrome calculation, and the use of a commercially available (31,15) decoder for de-coding Steps 2, 3 and 4.