Chip-to-chip half duplex data communication at 135 Mbps over power-supply rails

T. Hashida, Y. Bando, M. Nagata
{"title":"Chip-to-chip half duplex data communication at 135 Mbps over power-supply rails","authors":"T. Hashida, Y. Bando, M. Nagata","doi":"10.1109/ASSCC.2008.4708765","DOIUrl":null,"url":null,"abstract":"Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at 135 Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by more than 30 dB, purifying power supply current for internal circuits. Chip-to-chip power line communication invokes supplementary diagnosis functionality to be embedded in SoCs at the time of power connection, with the reduced cost of pin counts.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708765","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at 135 Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by more than 30 dB, purifying power supply current for internal circuits. Chip-to-chip power line communication invokes supplementary diagnosis functionality to be embedded in SoCs at the time of power connection, with the reduced cost of pin counts.
芯片到芯片的半双工数据通信在135 Mbps的电源轨道上
芯片到芯片的串行数据通信通过芯片、封装和电路板走线在常见的Vdd/Vss连接上叠加在电源上。电力线收发器演示了135 Mbps的半双工尖峰通信。片上电源线LC低通滤波器衰减伪差分通信尖峰超过30db,为内部电路净化电源电流。芯片到芯片的电力线通信调用补充诊断功能,在电源连接时嵌入到soc中,降低了引脚数的成本。
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